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ba67fb275e
* `table.sort` was improved further. It now guarentees N*log(N) time complexity in the worst case. * Fix https://github.com/Roblox/luau/issues/880 We are also working on fixing final bugs and crashes in the new type solver. On the CodeGen front we have a few things going on: * We have a smarter register allocator for the x86 JIT * We lower more instructions on arm64 * The vector constructor builtin is now translated to IR --------- Co-authored-by: Arseny Kapoulkine <arseny.kapoulkine@gmail.com> Co-authored-by: Vyacheslav Egorov <vegorov@roblox.com>
118 lines
3.2 KiB
C++
118 lines
3.2 KiB
C++
// This file is part of the Luau programming language and is licensed under MIT License; see LICENSE.txt for details
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#pragma once
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#include "Luau/AssemblyBuilderX64.h"
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#include "Luau/IrData.h"
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#include "Luau/RegisterX64.h"
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#include <array>
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#include <initializer_list>
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namespace Luau
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{
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namespace CodeGen
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{
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namespace X64
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{
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constexpr uint8_t kNoStackSlot = 0xff;
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struct IrSpillX64
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{
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uint32_t instIdx = 0;
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bool useDoubleSlot = 0;
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// Spill location can be a stack location or be empty
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// When it's empty, it means that instruction value can be rematerialized
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uint8_t stackSlot = kNoStackSlot;
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RegisterX64 originalLoc = noreg;
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};
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struct IrRegAllocX64
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{
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IrRegAllocX64(AssemblyBuilderX64& build, IrFunction& function);
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RegisterX64 allocGprReg(SizeX64 preferredSize, uint32_t instIdx);
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RegisterX64 allocXmmReg(uint32_t instIdx);
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RegisterX64 allocGprRegOrReuse(SizeX64 preferredSize, uint32_t instIdx, std::initializer_list<IrOp> oprefs);
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RegisterX64 allocXmmRegOrReuse(uint32_t instIdx, std::initializer_list<IrOp> oprefs);
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RegisterX64 takeReg(RegisterX64 reg, uint32_t instIdx);
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void freeReg(RegisterX64 reg);
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void freeLastUseReg(IrInst& target, uint32_t instIdx);
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void freeLastUseRegs(const IrInst& inst, uint32_t instIdx);
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bool isLastUseReg(const IrInst& target, uint32_t instIdx) const;
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bool shouldFreeGpr(RegisterX64 reg) const;
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// Register used by instruction is about to be freed, have to find a way to restore value later
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void preserve(IrInst& inst);
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void restore(IrInst& inst, bool intoOriginalLocation);
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void preserveAndFreeInstValues();
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uint32_t findInstructionWithFurthestNextUse(const std::array<uint32_t, 16>& regInstUsers) const;
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void assertFree(RegisterX64 reg) const;
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void assertAllFree() const;
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void assertNoSpills() const;
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AssemblyBuilderX64& build;
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IrFunction& function;
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uint32_t currInstIdx = ~0u;
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std::array<bool, 16> freeGprMap;
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std::array<uint32_t, 16> gprInstUsers;
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std::array<bool, 16> freeXmmMap;
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std::array<uint32_t, 16> xmmInstUsers;
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std::bitset<256> usedSpillSlots;
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unsigned maxUsedSlot = 0;
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std::vector<IrSpillX64> spills;
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};
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struct ScopedRegX64
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{
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explicit ScopedRegX64(IrRegAllocX64& owner);
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ScopedRegX64(IrRegAllocX64& owner, SizeX64 size);
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ScopedRegX64(IrRegAllocX64& owner, RegisterX64 reg);
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~ScopedRegX64();
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ScopedRegX64(const ScopedRegX64&) = delete;
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ScopedRegX64& operator=(const ScopedRegX64&) = delete;
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void alloc(SizeX64 size);
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void free();
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RegisterX64 release();
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IrRegAllocX64& owner;
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RegisterX64 reg;
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};
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// When IR instruction makes a call under a condition that's not reflected as a real branch in IR,
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// spilled values have to be restored to their exact original locations, so that both after a call
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// and after the skip, values are found in the same place
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struct ScopedSpills
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{
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explicit ScopedSpills(IrRegAllocX64& owner);
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~ScopedSpills();
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ScopedSpills(const ScopedSpills&) = delete;
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ScopedSpills& operator=(const ScopedSpills&) = delete;
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bool wasSpilledBefore(const IrSpillX64& spill) const;
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IrRegAllocX64& owner;
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std::vector<IrSpillX64> snapshot;
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};
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} // namespace X64
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} // namespace CodeGen
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} // namespace Luau
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