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66d379d293
Right now, we can compile R*K for all arithmetic instructions, but K*R gets compiled into two instructions (LOADN/LOADK + arithmetic opcode). This is problematic since it leads to reduced performance for some code. However, we'd like to avoid adding reverse variants of ADDK et al for all opcodes to avoid the increase in I$ footprint for interpreter. Looking at the arithmetic instructions, % and // don't have interesting use cases for K*V; ^ is sometimes used with constant on the left hand side but this would need to call pow() by necessity in all cases so it would be slow regardless of the dispatch overhead. This leaves the four basic arithmetic operations. For + and *, we can implement a compiler-side optimization in the future that transforms K*R to R*K automatically. This could either be done unconditionally at -O2, or conditionally based on the type of the value (driven by type annotations / inference) -- this technically changes behavior in presence of metamethods, although it might be sensible to just always do this because non-commutative +/* are evil. However, for - and / it is impossible for the compiler to optimize this in the future, so we need dedicated opcodes. This only increases the interpreter size by ~300 bytes (~1.5%) on X64. This makes spectral-norm and math-partial-sums 6% faster. To avoid the proliferation of bytecode versions this change piggybacks on the bytecode version bump that was just made in 604 for vector constants; we would still be able to enable these independently but we'll consider v5 complete when both are enabled.
229 lines
7 KiB
C++
229 lines
7 KiB
C++
// This file is part of the Luau programming language and is licensed under MIT License; see LICENSE.txt for details
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#pragma once
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#include "Luau/Common.h"
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#include "Luau/IrData.h"
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namespace Luau
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{
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namespace CodeGen
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{
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template<typename T>
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static void visitVmRegDefsUses(T& visitor, IrFunction& function, const IrInst& inst)
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{
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// For correct analysis, all instruction uses must be handled before handling the definitions
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switch (inst.cmd)
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{
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case IrCmd::LOAD_TAG:
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case IrCmd::LOAD_POINTER:
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case IrCmd::LOAD_DOUBLE:
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case IrCmd::LOAD_INT:
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case IrCmd::LOAD_TVALUE:
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visitor.maybeUse(inst.a); // Argument can also be a VmConst
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break;
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case IrCmd::STORE_TAG:
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case IrCmd::STORE_POINTER:
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case IrCmd::STORE_DOUBLE:
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case IrCmd::STORE_INT:
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case IrCmd::STORE_VECTOR:
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case IrCmd::STORE_TVALUE:
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case IrCmd::STORE_SPLIT_TVALUE:
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visitor.maybeDef(inst.a); // Argument can also be a pointer value
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break;
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case IrCmd::CMP_ANY:
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visitor.use(inst.a);
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visitor.use(inst.b);
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break;
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case IrCmd::JUMP_IF_TRUTHY:
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case IrCmd::JUMP_IF_FALSY:
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visitor.use(inst.a);
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break;
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// A <- B, C
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case IrCmd::DO_ARITH:
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visitor.maybeUse(inst.b); // Argument can also be a VmConst
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visitor.maybeUse(inst.c); // Argument can also be a VmConst
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visitor.def(inst.a);
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break;
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case IrCmd::GET_TABLE:
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visitor.use(inst.b);
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visitor.maybeUse(inst.c); // Argument can also be a VmConst
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visitor.def(inst.a);
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break;
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case IrCmd::SET_TABLE:
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visitor.use(inst.a);
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visitor.use(inst.b);
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visitor.maybeUse(inst.c); // Argument can also be a VmConst
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break;
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// A <- B
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case IrCmd::DO_LEN:
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visitor.use(inst.b);
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visitor.def(inst.a);
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break;
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case IrCmd::GET_IMPORT:
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visitor.def(inst.a);
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break;
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case IrCmd::CONCAT:
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visitor.useRange(vmRegOp(inst.a), function.uintOp(inst.b));
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visitor.defRange(vmRegOp(inst.a), function.uintOp(inst.b));
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break;
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case IrCmd::GET_UPVALUE:
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visitor.def(inst.a);
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break;
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case IrCmd::SET_UPVALUE:
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visitor.use(inst.b);
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break;
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case IrCmd::INTERRUPT:
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break;
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case IrCmd::BARRIER_OBJ:
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case IrCmd::BARRIER_TABLE_FORWARD:
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visitor.maybeUse(inst.b);
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break;
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case IrCmd::CLOSE_UPVALS:
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// Closing an upvalue should be counted as a register use (it copies the fresh register value)
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// But we lack the required information about the specific set of registers that are affected
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// Because we don't plan to optimize captured registers atm, we skip full dataflow analysis for them right now
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break;
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case IrCmd::CAPTURE:
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visitor.maybeUse(inst.a);
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if (function.uintOp(inst.b) == 1)
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visitor.capture(vmRegOp(inst.a));
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break;
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case IrCmd::SETLIST:
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visitor.use(inst.b);
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visitor.useRange(vmRegOp(inst.c), function.intOp(inst.d));
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break;
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case IrCmd::CALL:
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visitor.use(inst.a);
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visitor.useRange(vmRegOp(inst.a) + 1, function.intOp(inst.b));
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visitor.defRange(vmRegOp(inst.a), function.intOp(inst.c));
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break;
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case IrCmd::RETURN:
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visitor.useRange(vmRegOp(inst.a), function.intOp(inst.b));
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break;
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// TODO: FASTCALL is more restrictive than INVOKE_FASTCALL; we should either determine the exact semantics, or rework it
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case IrCmd::FASTCALL:
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case IrCmd::INVOKE_FASTCALL:
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if (int count = function.intOp(inst.e); count != -1)
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{
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if (count >= 3)
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{
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LUAU_ASSERT(inst.d.kind == IrOpKind::VmReg && vmRegOp(inst.d) == vmRegOp(inst.c) + 1);
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visitor.useRange(vmRegOp(inst.c), count);
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}
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else
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{
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if (count >= 1)
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visitor.use(inst.c);
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if (count >= 2)
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visitor.maybeUse(inst.d); // Argument can also be a VmConst
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}
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}
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else
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{
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visitor.useVarargs(vmRegOp(inst.c));
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}
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// Multiple return sequences (count == -1) are defined by ADJUST_STACK_TO_REG
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if (int count = function.intOp(inst.f); count != -1)
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visitor.defRange(vmRegOp(inst.b), count);
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break;
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case IrCmd::FORGLOOP:
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// First register is not used by instruction, we check that it's still 'nil' with CHECK_TAG
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visitor.use(inst.a, 1);
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visitor.use(inst.a, 2);
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visitor.def(inst.a, 2);
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visitor.defRange(vmRegOp(inst.a) + 3, function.intOp(inst.b));
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break;
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case IrCmd::FORGLOOP_FALLBACK:
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visitor.useRange(vmRegOp(inst.a), 3);
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visitor.def(inst.a, 2);
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visitor.defRange(vmRegOp(inst.a) + 3, uint8_t(function.intOp(inst.b))); // ignore most significant bit
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break;
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case IrCmd::FORGPREP_XNEXT_FALLBACK:
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visitor.use(inst.b);
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break;
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case IrCmd::FALLBACK_GETGLOBAL:
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visitor.def(inst.b);
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break;
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case IrCmd::FALLBACK_SETGLOBAL:
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visitor.use(inst.b);
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break;
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case IrCmd::FALLBACK_GETTABLEKS:
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visitor.use(inst.c);
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visitor.def(inst.b);
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break;
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case IrCmd::FALLBACK_SETTABLEKS:
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visitor.use(inst.b);
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visitor.use(inst.c);
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break;
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case IrCmd::FALLBACK_NAMECALL:
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visitor.use(inst.c);
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visitor.defRange(vmRegOp(inst.b), 2);
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break;
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case IrCmd::FALLBACK_PREPVARARGS:
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// No effect on explicitly referenced registers
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break;
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case IrCmd::FALLBACK_GETVARARGS:
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visitor.defRange(vmRegOp(inst.b), function.intOp(inst.c));
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break;
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case IrCmd::FALLBACK_DUPCLOSURE:
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visitor.def(inst.b);
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break;
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case IrCmd::FALLBACK_FORGPREP:
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visitor.use(inst.b);
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visitor.defRange(vmRegOp(inst.b), 3);
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break;
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case IrCmd::ADJUST_STACK_TO_REG:
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visitor.defRange(vmRegOp(inst.a), -1);
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break;
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case IrCmd::ADJUST_STACK_TO_TOP:
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// While this can be considered to be a vararg consumer, it is already handled in fastcall instructions
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break;
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case IrCmd::GET_TYPEOF:
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visitor.use(inst.a);
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break;
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case IrCmd::FINDUPVAL:
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visitor.use(inst.a);
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break;
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default:
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// All instructions which reference registers have to be handled explicitly
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LUAU_ASSERT(inst.a.kind != IrOpKind::VmReg);
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LUAU_ASSERT(inst.b.kind != IrOpKind::VmReg);
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LUAU_ASSERT(inst.c.kind != IrOpKind::VmReg);
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LUAU_ASSERT(inst.d.kind != IrOpKind::VmReg);
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LUAU_ASSERT(inst.e.kind != IrOpKind::VmReg);
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LUAU_ASSERT(inst.f.kind != IrOpKind::VmReg);
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break;
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}
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}
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template<typename T>
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static void visitVmRegDefsUses(T& visitor, IrFunction& function, const IrBlock& block)
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{
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for (uint32_t instIdx = block.start; instIdx <= block.finish; instIdx++)
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{
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IrInst& inst = function.instructions[instIdx];
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visitVmRegDefsUses(visitor, function, inst);
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}
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}
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} // namespace CodeGen
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} // namespace Luau
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