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1fa8311a18
* Fix #817 * Fix #850 * Optimize math.floor/ceil/round with SSE4.1 * Results in a ~7-9% speedup on the math-cordic benchmark. * Optimized table.sort. * table.sort is now ~4.1x faster (when not using a predicate) and ~2.1x faster when using a simple predicate. Performance may improve further in the future. * Reorganize the memory ownership of builtin type definitions. * This is a small initial step toward affording parallel typechecking. The new type solver is coming along nicely. We are working on fixing crashes and bugs. A few major changes to native codegen landed this week: * Fixed lowering of Luau IR mod instruction when first argument is a constant * Added VM register data-flow/capture analysis * Fixed issues with optimizations in unreachable blocks --------- Co-authored-by: Arseny Kapoulkine <arseny.kapoulkine@gmail.com> Co-authored-by: Vyacheslav Egorov <vegorov@roblox.com>
82 lines
1.7 KiB
C++
82 lines
1.7 KiB
C++
// This file is part of the Luau programming language and is licensed under MIT License; see LICENSE.txt for details
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#pragma once
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#include <bitset>
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#include <utility>
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#include <vector>
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#include <stdint.h>
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namespace Luau
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{
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namespace CodeGen
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{
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struct IrBlock;
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struct IrFunction;
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void updateUseCounts(IrFunction& function);
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void updateLastUseLocations(IrFunction& function);
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// Returns how many values are coming into the block (live in) and how many are coming out of the block (live out)
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std::pair<uint32_t, uint32_t> getLiveInOutValueCount(IrFunction& function, IrBlock& block);
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uint32_t getLiveInValueCount(IrFunction& function, IrBlock& block);
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uint32_t getLiveOutValueCount(IrFunction& function, IrBlock& block);
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struct RegisterSet
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{
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std::bitset<256> regs;
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// If variadic sequence is active, we track register from which it starts
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bool varargSeq = false;
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uint8_t varargStart = 0;
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};
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struct CfgInfo
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{
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std::vector<uint32_t> predecessors;
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std::vector<uint32_t> predecessorsOffsets;
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std::vector<uint32_t> successors;
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std::vector<uint32_t> successorsOffsets;
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std::vector<RegisterSet> in;
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std::vector<RegisterSet> out;
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RegisterSet captured;
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};
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void computeCfgInfo(IrFunction& function);
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struct BlockIteratorWrapper
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{
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uint32_t* itBegin = nullptr;
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uint32_t* itEnd = nullptr;
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bool empty() const
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{
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return itBegin == itEnd;
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}
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size_t size() const
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{
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return size_t(itEnd - itBegin);
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}
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uint32_t* begin() const
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{
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return itBegin;
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}
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uint32_t* end() const
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{
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return itEnd;
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}
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};
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BlockIteratorWrapper predecessors(CfgInfo& cfg, uint32_t blockIdx);
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BlockIteratorWrapper successors(CfgInfo& cfg, uint32_t blockIdx);
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} // namespace CodeGen
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} // namespace Luau
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