Arseny Kapoulkine 0338e0e52d CodeGen: Implement SIMD math and vector moves ... This change extends fadd/fsub/fmul/fdiv/fneg and mov to work on qN registers. For arithmetics we assume .4s format (4 single-precision floats). Alternatively we could also make new fmul_4s et al but it seems unlikely that we'll need alternative variants in the future; if we do, we could always rework the code. placeVR mnemonic is the same as placeR3 but I split it so that it is easier to modify in the future. For fneg I've reused placeR1 (it won't print .4s suffix in text disassembly but... it's unclear that we care). Vector moves are weird on A64: they are an alias for OR of a register with itself.		2024-02-13 15:35:17 -08:00
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include	CodeGen: Implement SIMD math and vector moves	2024-02-13 15:35:17 -08:00
src	CodeGen: Implement SIMD math and vector moves	2024-02-13 15:35:17 -08:00