diff --git a/CodeGen/src/IrLoweringA64.cpp b/CodeGen/src/IrLoweringA64.cpp
index 97251948..d29755f1 100644
--- a/CodeGen/src/IrLoweringA64.cpp
+++ b/CodeGen/src/IrLoweringA64.cpp
@@ -707,7 +707,7 @@ void IrLoweringA64::lowerInst(IrInst& inst, uint32_t index, const IrBlock& next)
     case IrCmd::SELECT_NUM:
     {
         LUAU_ASSERT(FFlag::LuauCodeGenLerp);
-        inst.regA64 = regs.allocReuse(KindA64::d, index, {inst.a, inst.b});
+        inst.regA64 = regs.allocReuse(KindA64::d, index, {inst.a, inst.b, inst.c, inst.d});
 
         RegisterA64 temp1 = tempDouble(inst.a);
         RegisterA64 temp2 = tempDouble(inst.b);
diff --git a/CodeGen/src/IrLoweringX64.cpp b/CodeGen/src/IrLoweringX64.cpp
index 2017ce57..c1a84c8e 100644
--- a/CodeGen/src/IrLoweringX64.cpp
+++ b/CodeGen/src/IrLoweringX64.cpp
@@ -626,7 +626,7 @@ void IrLoweringX64::lowerInst(IrInst& inst, uint32_t index, const IrBlock& next)
     case IrCmd::SELECT_NUM:
     {
         LUAU_ASSERT(FFlag::LuauCodeGenLerp);
-        inst.regX64 = regs.allocRegOrReuse(SizeX64::xmmword, index, {inst.a}); // can't reuse b if a is a memory operand
+        inst.regX64 = regs.allocRegOrReuse(SizeX64::xmmword, index, {inst.a, inst.c, inst.d}); // can't reuse b if a is a memory operand
 
         ScopedRegX64 tmp{regs, SizeX64::xmmword};
 
diff --git a/CodeGen/src/IrTranslateBuiltins.cpp b/CodeGen/src/IrTranslateBuiltins.cpp
index fd247b5b..a5fa3ad0 100644
--- a/CodeGen/src/IrTranslateBuiltins.cpp
+++ b/CodeGen/src/IrTranslateBuiltins.cpp
@@ -311,7 +311,7 @@ static BuiltinImplResult translateBuiltinMathLerp(
     IrOp t = builtinLoadDouble(build, arg3);
 
     IrOp l = build.inst(IrCmd::ADD_NUM, a, build.inst(IrCmd::MUL_NUM, build.inst(IrCmd::SUB_NUM, b, a), t));
-    IrOp r = build.inst(IrCmd::SELECT_NUM, l, b, t, build.constDouble(1.0), build.cond(IrCondition::Equal));
+    IrOp r = build.inst(IrCmd::SELECT_NUM, l, b, t, build.constDouble(1.0)); // select on t==1.0
 
     build.inst(IrCmd::STORE_DOUBLE, build.vmReg(ra), r);