2023-02-24 21:49:38 +00:00
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// This file is part of the Luau programming language and is licensed under MIT License; see LICENSE.txt for details
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2023-03-31 19:42:49 +01:00
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#include "Luau/IrRegAllocX64.h"
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2023-02-24 21:49:38 +00:00
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namespace Luau
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{
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namespace CodeGen
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{
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2023-03-03 20:21:14 +00:00
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namespace X64
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{
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2023-02-24 21:49:38 +00:00
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static const RegisterX64 kGprAllocOrder[] = {rax, rdx, rcx, rbx, rsi, rdi, r8, r9, r10, r11};
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IrRegAllocX64::IrRegAllocX64(IrFunction& function)
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: function(function)
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{
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freeGprMap.fill(true);
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freeXmmMap.fill(true);
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}
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RegisterX64 IrRegAllocX64::allocGprReg(SizeX64 preferredSize)
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{
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LUAU_ASSERT(
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preferredSize == SizeX64::byte || preferredSize == SizeX64::word || preferredSize == SizeX64::dword || preferredSize == SizeX64::qword);
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for (RegisterX64 reg : kGprAllocOrder)
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{
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if (freeGprMap[reg.index])
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{
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freeGprMap[reg.index] = false;
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return RegisterX64{preferredSize, reg.index};
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}
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}
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LUAU_ASSERT(!"Out of GPR registers to allocate");
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return noreg;
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}
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RegisterX64 IrRegAllocX64::allocXmmReg()
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{
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for (size_t i = 0; i < freeXmmMap.size(); ++i)
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{
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if (freeXmmMap[i])
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{
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freeXmmMap[i] = false;
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return RegisterX64{SizeX64::xmmword, uint8_t(i)};
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}
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}
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LUAU_ASSERT(!"Out of XMM registers to allocate");
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return noreg;
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}
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RegisterX64 IrRegAllocX64::allocGprRegOrReuse(SizeX64 preferredSize, uint32_t index, std::initializer_list<IrOp> oprefs)
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{
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for (IrOp op : oprefs)
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{
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if (op.kind != IrOpKind::Inst)
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continue;
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IrInst& source = function.instructions[op.index];
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if (source.lastUse == index && !source.reusedReg)
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{
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LUAU_ASSERT(source.regX64.size != SizeX64::xmmword);
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LUAU_ASSERT(source.regX64 != noreg);
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source.reusedReg = true;
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return RegisterX64{preferredSize, source.regX64.index};
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}
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}
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return allocGprReg(preferredSize);
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}
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RegisterX64 IrRegAllocX64::allocXmmRegOrReuse(uint32_t index, std::initializer_list<IrOp> oprefs)
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{
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for (IrOp op : oprefs)
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{
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if (op.kind != IrOpKind::Inst)
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continue;
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IrInst& source = function.instructions[op.index];
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if (source.lastUse == index && !source.reusedReg)
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{
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LUAU_ASSERT(source.regX64.size == SizeX64::xmmword);
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LUAU_ASSERT(source.regX64 != noreg);
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source.reusedReg = true;
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return source.regX64;
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}
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}
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return allocXmmReg();
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}
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2023-03-31 19:42:49 +01:00
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RegisterX64 IrRegAllocX64::takeReg(RegisterX64 reg)
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2023-03-03 20:21:14 +00:00
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{
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// In a more advanced register allocator, this would require a spill for the current register user
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// But at the current stage we don't have register live ranges intersecting forced register uses
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2023-03-31 19:42:49 +01:00
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if (reg.size == SizeX64::xmmword)
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{
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LUAU_ASSERT(freeXmmMap[reg.index]);
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freeXmmMap[reg.index] = false;
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}
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else
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{
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LUAU_ASSERT(freeGprMap[reg.index]);
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freeGprMap[reg.index] = false;
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}
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2023-03-03 20:21:14 +00:00
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return reg;
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}
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2023-02-24 21:49:38 +00:00
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void IrRegAllocX64::freeReg(RegisterX64 reg)
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{
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if (reg.size == SizeX64::xmmword)
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{
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LUAU_ASSERT(!freeXmmMap[reg.index]);
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freeXmmMap[reg.index] = true;
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}
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else
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{
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LUAU_ASSERT(!freeGprMap[reg.index]);
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freeGprMap[reg.index] = true;
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}
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}
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void IrRegAllocX64::freeLastUseReg(IrInst& target, uint32_t index)
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{
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if (isLastUseReg(target, index))
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2023-02-24 21:49:38 +00:00
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{
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// Register might have already been freed if it had multiple uses inside a single instruction
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if (target.regX64 == noreg)
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return;
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freeReg(target.regX64);
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target.regX64 = noreg;
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}
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}
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void IrRegAllocX64::freeLastUseRegs(const IrInst& inst, uint32_t index)
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{
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auto checkOp = [this, index](IrOp op) {
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if (op.kind == IrOpKind::Inst)
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freeLastUseReg(function.instructions[op.index], index);
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};
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checkOp(inst.a);
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checkOp(inst.b);
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checkOp(inst.c);
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checkOp(inst.d);
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checkOp(inst.e);
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checkOp(inst.f);
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}
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2023-03-31 19:42:49 +01:00
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bool IrRegAllocX64::isLastUseReg(const IrInst& target, uint32_t index) const
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{
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return target.lastUse == index && !target.reusedReg;
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}
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bool IrRegAllocX64::shouldFreeGpr(RegisterX64 reg) const
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{
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if (reg == noreg)
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return false;
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LUAU_ASSERT(reg.size != SizeX64::xmmword);
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for (RegisterX64 gpr : kGprAllocOrder)
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{
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if (reg.index == gpr.index)
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return true;
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}
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return false;
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}
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void IrRegAllocX64::assertFree(RegisterX64 reg) const
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{
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if (reg.size == SizeX64::xmmword)
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LUAU_ASSERT(freeXmmMap[reg.index]);
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else
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LUAU_ASSERT(freeGprMap[reg.index]);
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}
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2023-03-03 20:21:14 +00:00
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void IrRegAllocX64::assertAllFree() const
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{
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for (RegisterX64 reg : kGprAllocOrder)
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LUAU_ASSERT(freeGprMap[reg.index]);
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for (bool free : freeXmmMap)
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LUAU_ASSERT(free);
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}
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2023-03-10 20:21:07 +00:00
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ScopedRegX64::ScopedRegX64(IrRegAllocX64& owner)
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: owner(owner)
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, reg(noreg)
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{
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}
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2023-02-24 21:49:38 +00:00
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ScopedRegX64::ScopedRegX64(IrRegAllocX64& owner, SizeX64 size)
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: owner(owner)
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2023-03-10 20:21:07 +00:00
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, reg(noreg)
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2023-02-24 21:49:38 +00:00
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{
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2023-03-10 20:21:07 +00:00
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alloc(size);
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2023-02-24 21:49:38 +00:00
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}
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ScopedRegX64::ScopedRegX64(IrRegAllocX64& owner, RegisterX64 reg)
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: owner(owner)
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, reg(reg)
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{
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}
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ScopedRegX64::~ScopedRegX64()
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{
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if (reg != noreg)
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owner.freeReg(reg);
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}
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2023-03-10 20:21:07 +00:00
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void ScopedRegX64::alloc(SizeX64 size)
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{
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LUAU_ASSERT(reg == noreg);
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if (size == SizeX64::xmmword)
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reg = owner.allocXmmReg();
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else
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reg = owner.allocGprReg(size);
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}
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2023-02-24 21:49:38 +00:00
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void ScopedRegX64::free()
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{
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LUAU_ASSERT(reg != noreg);
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owner.freeReg(reg);
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reg = noreg;
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}
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2023-03-31 19:42:49 +01:00
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RegisterX64 ScopedRegX64::release()
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{
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RegisterX64 tmp = reg;
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reg = noreg;
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return tmp;
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}
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2023-03-03 20:21:14 +00:00
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} // namespace X64
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2023-02-24 21:49:38 +00:00
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} // namespace CodeGen
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} // namespace Luau
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